One kind, because of 2.5G and 3G cell phone power management solution
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Users generally have a lot of requirements to the cell phone bought by oneself, long holding time and long standby time are obviously most important two items among them. Though 2G cell phone can converse for several hours and await the opportune moment for several days at present, but the honeycomb products of new 2.5G and 3G can’t be accomplished like this. In fact the early testing of Japan finds, there is no electricity when being used for less than one hour in some 3G cell phones.
The designer should realize, the answer of solving this problem not merely lies in the simulation part or digital part that the cell phone is designed, should satisfy end user’s requirement in power consumption, designers must have a totality power management scheme while developing the system of future generation. This text will discuss each factor that the systematic power consumption will be involved in detail, will analyze the power management difficult problem that a designer will face, and recommend solving some potential solutions of the difficult problem of this design.
Main influence factor
Before discussing details, let us look first briefly that must carry on the key part of power management in the cell phone. Fig. 1 is the main power consumption module that a typical 2.5G cell phone is designed.
It is one of the main difficult points of the power management to send the power amplifier for design engineer, this kind of power amplifier requires peak value electric current, about 1 ampere sometimes very, so part this consume the intersection of battery of mobile phone and the intersection of energy ratio and large other parts any. Under the common operating position, half that the electric energy that the power amplifier consumes should nearly account for the total energy of the battery.
There are not so much as consumption of power amplifier RF transceivers, but will bring the question of some power to the designer too. On average, the spent electric current under sending or reception mode of the transceiver is between 50 to 100mA.
Besides power consumption, the transceiver also brings another challenge to the designer, namely the overall performance that the noise received from cell phone other parts power will influence the transceiver greatly. So designers must isolate the power of the transceiver, in order to deal with the noise question that may appear.
Including the power that coder-decoder of the audio frequency, radio frequency coder-decoder and simulation base band device of the power control function consume is not high, but will not meet the mobile phone performance requirement unless offer the clean power either.
Except sending the power amplifier, power that the device of the digital basedand consumes is most, it is more complicated for the power consumption of the digital basedand IC to understand, because the great processor clock speed and wafer craft relation property,etc. cause a lot of this to subdue his long phenomenon. Generally speaking, can realize the high clock speed is in order to meet the wafer craft of the application requirement, its relative great of leak current of inactive state, this will cause formative because of logic switchly there will be source power parts, and know the leakage part of the consumed power no matter the processor is switches.
List the main power consumptive part of the cell phone above, now let us look the designer solves the technology that these problems use. We begin partly from the digital basedand.
Question of the logic function
As to the battery-driven or low power consumption apparatus, digital signal processors in different periods have all proposed the requirement of power management, the main focal point lowers source power, it is the power consumption caused that the nodal electric capacity charges and discharges in signal conversion and design to CMOS technology. Reduce this dynamic power consumption part and the efforts to carry on have been concentrated on clock control all the time, because the clock is a master excitation source in the synchronization system.
It has the effective way of controlling the clock to cut the system clock network apart into the single clock land with automatic software control all the time, new clock technology such as dynamic power and frequency change (DVFS) nowadays Also hit by reaching DSP system, can further reduce the active power consumption.
The working voltage of a certain modular circuit face rising in the system while handling the task strenuously DVFS’s allowing, thus make the clock rate and voltage increase temporarily. The principle that it reduces the systematic power consumption is, the systematic circuit works in lower voltage and frequency mode under the normal conditions, turn into more high power consumption mode faster only while carrying on a large amount of data processing. But the one that must point out is, technical development and the main mains voltage caused is dropping (from 5 volt to 3.3 volt to 1.8/1.5 volts constantly, moving towards 1.2 volts and lower now) Restrain DVFS from really contributing in the synchronisation circuit, become because of the most low at this moment and maximum operating voltage very close.
It initiates some new power control problems too that the structural quiescent power drain of base band is controlled. Because the quiescent power drain of transistor-resistor logic increases by a wide margin in modern CMOS technology, especially while supporting high performance to be operated, this because of must dwindle but also die transistor-resistor logic threshold voltage geometric dimensions for meet performance requirement mainly, and this static part (or leak current) Very sensitive to the mains voltage level. Fig. 2 has revealed trends and quiescent power drain change (use the high-performance transistor-resistor logic in the peak voltage) of microprocessor .
It is it anaphase to at also now aim at not lasting new technologying where leak current influencing and awaiting the opportune moment while adopting development phase ‘ or ” The sleep ” )System state, state of this kind of power or maintaining all or some system states, or totally close. While maintaining the state, can adopt the practice of reducing working voltage, but need should use some special technology of bias voltage in functions such as memorizer and register,etc.; While closing in state, the system must turn off the module in DSP, the module, in order to guarantee the influence that they are not operated by other parts of the system through the electrical isolation.
It can also be regarded as an index that the power is let out, limit it to the total number of transistor-resistor logics constructed of a certain function. Whether from the static behavior or from the viewpoint of dynamic power consumption, the transistor-resistor logic does not have no cost, so must optimize the module, adopt the transistor-resistor logic of the minimum quantity as much as possible.
Overall point of view
The above-mentioned discussions explain, why must carry on overall power management on the whole base band chip level, share clock and power supply control recombination a kind of hardware and software designer and the concerted model. The management expectancy of the power links every part together in order to control effectively.
While dealing with the hardware part of base band, designers must cut the system apart into adopting the modal function of the similar power and form a cluster (call the land too) carefully at first ,For example, some devices can support the voltage and frequency to turn off when go up and down and can not be needed, but some have source power state and must maintain this kind of state to must have worked all the time in the great. Second, in order to realize the power management seamless association of the chip level, these lands must link up by controlling the state of its power through the standard method. The implement method is to give each land a power ” The envelope ” (wrapper) ,It makes the inner power state control difficult problem in the land solved with the hardware, and is improving progressively through emerging riper circuit engineering.
Third, as to some logic functions shared between each land (if interconnect, cut off and wake the incident up, and clock and power) on slice ,Must treat separately through controlling the power state of the relevant land. It is very careful to cut off and must wake the treatment of the incident and switch between the two up on the basis of change of state of the power, because it is essential to wake for guaranteeing to already this close the system component up normally.
The partial power consumption of the software of base band, mainly depend on the real-time operating system for executing the task the activity demand change of the required hardware function carries on the ability of catching and modeling. The power management of the software is divided into three main parts. Part one Including executing the task various routes of information, what resources is for example the chip to belong to needing dynamically, and need reaching for the time limit of meeting carrying out characteristic (the voltage of sum of FTOP is fixed how high for 100%) . People are developing API and supporting this one to need now, but some parameters are difficult to obtain, so should offer a silent way, the visit of the apparatus of setting up to the outside etc. is asked (usually adjust and use going on through OS) Automatic classification is by way of strengthening this defaultly.
Part two Include a power and clock land dispatcher correlated to task scheduler, and take the appropriate system state to keep the measure according to hardware ability and voltage level and frequency that is required of waking up or closing every land, definition of time limit requirement faced of bottom layer. Dispatcher of this power will also control the operating position of resource, and will unite the task scheduler and make the decision together, in order to make, close interval of time to be as as possible long.
Part three It is to not using the land power state to carry on static assignment according to the disposition of OS. For example, this kind of distribution can determine whether can close some and have resources outside completely when not putting the corresponding driver program.
Have revealed a hardware to cut apart interconnecting to power management and software stack frame in Fig. 3, the sectional hard software organization of such distributed power management scheme has been already in a 3G terminal base band chip (on the basis of craft of 0.1 microns) Have had and paid testing, the result shows, compared with traditional ring management scheme, the leak current during working of new scheme has reduced about 10 times, standby mode played the leak current to reduce about 1,000 times.
Partial challenge of simulation
Though the analogue function of the mobile phone of the honeycomb is not the power most consumptive, the partial power consumption of simulation is still very important, have carried on a large number of work too in order to reduce this part of power consumption.
It has a route to reduce the power consumption of the cell phone to integrate analog-digital converter and digital-analogue converter in the systematic base band logic function all the time. Though in the special simulation craft, the component can’t be matched accurately and the upper voltage bring some to challenge specially even more, but the circuit designer has found out creatively a deals with the method, namely make use of digital function to control and normalize the basic analog module as many as possible, such as ADC and DAC,etc..
It is such a technology that the dynamic element is matched, it utilizes a component matrix that can switch to different states, cause one the intersection of statistics and result at the intersection of circuit and characteristic, get analogue function, carry out, stand up, seem each component get easy to match the same already. Another technology is to utilize the numerical filtering as many as possible, move the filtering task to the digital field in order to reduce the requirements for simulation performance more briefly.
Integrate, reduce used to guide number of leg high-speed digital interface among the IC also ADC and DAC, thus reduce power consumption. When integrated ADC or DAC, because one the intersection of simulation and port at the the intersection of system and the intersection of base band and processor can replace one digital interface, so the power consumption of the interface will be reduced, the systematic digital noise is coupled and brought down to minimum.
RF and power control problem
RF part of the mobile phone of the honeycomb includes one sends the power amplifier and a dwarf signal transceiver, the present trend adopts advanced CMOS technology or detailed interval silicon craft germide to reduce the power consumption in the transceiver, employ special silicon DMOS craft or GaAs technology to reduce the power consumption of the power amplifier.
While developing towards 2.5G and 3G wireless interfacing, demanding to adopt makes the power amplifier of the cell phone present the new modulation scheme of the higher linear scale. Because more rigorous linear scale requirement will usually enable almost 10% to 20% of efficiency loss of the power amplifier, so the designers are studying new technology in order to overcome these challenges, the predistortion is such a technology, it changes the input signal according to non- linear scale of the power amplifier, thus make power amplifier turn into the intersection of high-precision and modulating simultaneous working when being more high-efficiency.
When lower than the crest value in output power, the power amplifier efficiency will drop seriously too. Close to peak output (user can be used when being almost endmost because of mobile phone from the intersection of honeycomb and the intersection of launching tower and distance only when) seldom usually while using ,So the efficiency when some mobile phones design now to resume lower output power by DC/DC converter. Under the normal operating position, the ultimateoutput efficiency that DC/DC converter efficiency causes is lost, can well compensate by improving to the efficiency under relatively low power.
In the power administrative section, it is a very important trend too to integrate. Using in a large amount, dynamic voltage going up and down and demand for bias-voltage control of the extra circuit of the land that * lead that modern processor is designed, make the problem of management of the systematic processor power very complicated. In addition, the Integrated analogue function needs very clean power, the mains regulator that for this reason will preferably supply power for the analogue function is integrated completely.
With RF / base band Integrated appearance, some companies announce the radio frequency of Integrated bluetooth will probably appear with the honeycomb radio frequency subsequently, it is more harsh to regulate, require to the power on clean block when the time comes. Certainly, the integrated mains regulator is a task that has challenge very much in the figure CMOS logic craft, need special transistor-resistor logic to design in order to meet the high-voltage requirement that battery voltage brings, in some cases must reduce by an outer preconditioner and is defeated by the voltage of the device on slice.
This text summary
Just as this text showed, positive power control is essential in the modern mobile phone design. Though a lot of challenges exist, the designers have put forward many kinds of new power management schemes, reduce the total power consumption of the cell phone, thus improve awaiting the opportune moment and holding time in the near future.
With the continuation of 2.5G/3G development, the designers will face a lot of new challenges. For instance Integrated camera, colored display screen, interdynamic game,etc. will make the power consumption of the cell phone awkward constantly more multi-functionally, force the design engineer to continue developing and adopting the new power management scheme. In a word, the key to success is to adopt a kind of overall system power consumption to reduce the scheme while the cell phone is designed.
Tags: because of 2.5G and 3G cell phone power management solution, One kind
